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Peerless has extensive experience designing DSP hardware and
software, including 16-bit fixed point and 32-bit floating
point processors. Algorithms developed achieve accurate signal
measurement with fast response times in high noise environments.
DSP filters are implemented in either software or an FPGA.
Software is created in high level C/C++ and/or assembly language.
FPGA DSP designs are developed with MathCAD, MatLab and VHDL
CAD software. Products are compatible with the VME64 and PCI
Mezzanine standards.
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Click here to request information
or phone (in North America) 631.396.6500, Fax: 631.396.6555
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